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dc.contributor.author吳奕緯en_US
dc.contributor.author田濱華en_US
dc.contributor.author鍾崇斌en_US
dc.contributor.author單智君en_US
dc.date.accessioned2014-12-16T06:16:47Z-
dc.date.available2014-12-16T06:16:47Z-
dc.date.issued2011-06-11en_US
dc.identifier.govdocG06F012/00zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/106086-
dc.description.abstract本發明係揭露一種記憶裝置及其迴圈緩衝器(loop buf-fer)。在一實施例中,此迴圈緩衝器包含一緩衝記憶體單元及一分支目的緩衝區(BTB),緩衝記憶體單元可儲存最內層迴圈指令(innermost loop instruction),而分支目的緩衝區(BTB)可儲存此緩衝記憶體單元內之指令之追跡資料(track)。藉此,此迴圈緩衝器可儲存包含向前分支(forward branch)及函式(subroutine)之迴圈指令,以進一步減少指令提取之耗能。zh_TW
dc.language.isozh_TWen_US
dc.title記憶裝置及其迴圈緩衝器zh_TW
dc.typePatentsen_US
dc.citation.patentcountryTWNzh_TW
dc.citation.patentnumberI343521zh_TW
Appears in Collections:Patents


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