1. 目前位置：

完整後設資料紀錄
DC 欄位值語言
dc.contributor.authorWu, C. H.en_US
dc.contributor.authorHung, B. F.en_US
dc.contributor.authorChin, Alberten_US
dc.contributor.authorWang, S. J.en_US
dc.contributor.authorWang, X. P.en_US
dc.contributor.authorLi, M. -F.en_US
dc.contributor.authorZhu, C.en_US
dc.contributor.authorYen, F. Y.en_US
dc.contributor.authorHou, Y. T.en_US
dc.contributor.authorJin, Y.en_US
dc.contributor.authorTao, H. J.en_US
dc.contributor.authorChen, S. C.en_US
dc.contributor.authorLiang, M. S.en_US
dc.date.accessioned2014-12-08T15:14:22Z-
dc.date.available2014-12-08T15:14:22Z-
dc.date.issued2007-04-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2007.892367en_US
dc.identifier.urihttp://hdl.handle.net/11536/10973-
dc.description.abstractWe report a novel 1000 degrees C stable HfLaON p-MOSFET with Ir3Si gate. Low leakage current of 1.8 x 10(-5) A/cm(2) at 1 V above flat-band voltage, good effective work function of 5.08 eV, and high mobility of 84 cm(2)/V center dot s are simultaneously obtained at 1.6 nm equivalent oxide thickness. This gate-first p-MOSFET process with self-aligned ion implant and 1000 degrees C rapid thermal annealing is fully compatible to current very large scale integration fabrication lines.en_US
dc.language.isoen_USen_US
dc.subjectHfLaONen_US
dc.subjectIr3Sien_US
dc.subjectMOSFETen_US
dc.subjectwork functionen_US
dc.titleHigh-temperature stable HfLaON p-MOSFETs with high-work-function Ir3Si gateen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2007.892367en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume28en_US
dc.citation.issue4en_US
dc.citation.spage292en_US
dc.citation.epage294en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000245225300012-
dc.citation.woscount10-
顯示於類別：期刊論文


文件中的檔案：

  1. 000245225300012.pdf

若為 zip 檔案，請下載檔案解壓縮後，用瀏覽器開啟資料夾中的 index.html 瀏覽全文。

相關內容
Loading...