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dc.contributor.authorChang, Kow-Mingen_US
dc.contributor.authorLuo, Jiunn-Jyeen_US
dc.contributor.authorChiang, Chen-Deren_US
dc.contributor.authorLiu, Jacob Kou-Chenen_US
dc.date.accessioned2014-12-08T15:15:01Z-
dc.date.available2014-12-08T15:15:01Z-
dc.date.issued2007-01-01en_US
dc.identifier.issn0253-3839en_US
dc.identifier.urihttp://hdl.handle.net/11536/11300-
dc.description.abstractThe wet etching characteristics of InSb single crystal were investigated for highdensity focal plane array applications. Two different chemical systems were used to prepare the mesa structures using standard lithography. The wet etching characteristics corresponding to these chemical systems were measured and analyzed. The results can be used to identify the dominant control mechanisms during the etching process. The etching conditions such as the chemical concentration will influence the etching characteristics, the effects of which lead to our understanding the dominant control mechanism after optimizing different ratios of wet etching chemicals. Citric acid/peroxide has been shown to produce a practical etching rate at room temperature. The dominant control mechanism for InSb mesa etching in citric acid/peroxide is surface reaction rate-limit oriented, in that it depicts promising potential in morphology and sidewall profile control for InSb mesa type device applications. To verify the feasibility of these processes for device applications, a field emission scanning electron microscope was used to analyze the step coverage for dielectric deposition and metal layer coating. To meet the requirements of InSb high density array applications, a peroxide based chemical system with reaction rate-limit mechanism was concocted to bring to produce superior etching performance in comparison with a nitric acid based solution.en_US
dc.language.isoen_USen_US
dc.subjectmesa step heighten_US
dc.subjectmesa etchingen_US
dc.subjectetching mechanismen_US
dc.subjectimage arrayen_US
dc.titleMesa etching characterization of InSb for high density image array applicationsen_US
dc.typeArticleen_US
dc.identifier.journalJOURNAL OF THE CHINESE INSTITUTE OF ENGINEERSen_US
dc.citation.volume30en_US
dc.citation.issue1en_US
dc.citation.spage11en_US
dc.citation.epage16en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000243964500002-
dc.citation.woscount3-
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