完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Meng, Hsin-Fei | en_US |
dc.contributor.author | Liu, Chien-Cheng | en_US |
dc.contributor.author | Jiang, Chin-Jung | en_US |
dc.contributor.author | Yeh, Yu-Lin | en_US |
dc.contributor.author | Horng, Sheng-Fu | en_US |
dc.contributor.author | Hsu, Chain-Shu | en_US |
dc.date.accessioned | 2014-12-08T15:15:13Z | - |
dc.date.available | 2014-12-08T15:15:13Z | - |
dc.date.issued | 2006-12-11 | en_US |
dc.identifier.issn | 0003-6951 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1063/1.2403921 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/11440 | - |
dc.description.abstract | Poly(3-hexylthiophene) (P3HT) field-effect transistors (FETs) are fabricated on glass substrates with SiO2 as a gate dielectric over the gate. Indium tin oxide (ITO), Al, and Cr are employed as gate metals. For spin-coated FET, the mobility increases from 10(-4)-10(-5) cm(2)/V s for ITO and Al gates to 10(-2) cm(2)/V s for Cr gate. After O-2 plasma treatment, the SiO2 roughness can be made as low as 0.7 nm. The mobility is further improved up to 0.3 cm(2)/V s by dip-coating P3HT. "Crossed rods" such as morphology can be observed in dip-coated FET with high mobility, indicating high degree of self-assembly facilitated by the flat SiO2 surface over Cr gate. (c) 2006 American Institute of Physics. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Effect of gate metal on polymer transistor with glass substrate | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1063/1.2403921 | en_US |
dc.identifier.journal | APPLIED PHYSICS LETTERS | en_US |
dc.citation.volume | 89 | en_US |
dc.citation.issue | 24 | en_US |
dc.citation.epage | en_US | |
dc.contributor.department | 應用化學系 | zh_TW |
dc.contributor.department | 物理研究所 | zh_TW |
dc.contributor.department | Department of Applied Chemistry | en_US |
dc.contributor.department | Institute of Physics | en_US |
dc.identifier.wosnumber | WOS:000242886500124 | - |
dc.citation.woscount | 8 | - |
顯示於類別: | 期刊論文 |