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dc.contributor.authorSheu, Yi-Mingen_US
dc.contributor.authorSu, Ke-Weien_US
dc.contributor.authorTian, Shiyangen_US
dc.contributor.authorYang, Sheng-Jieren_US
dc.contributor.authorWang, Chih-Chiangen_US
dc.contributor.authorChen, Ming-Jeren_US
dc.contributor.authorLiu, Sallyen_US
dc.date.accessioned2014-12-08T15:15:28Z-
dc.date.available2014-12-08T15:15:28Z-
dc.date.issued2006-11-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2006.884070en_US
dc.identifier.urihttp://hdl.handle.net/11536/11577-
dc.description.abstractThe well-edge proximity effect caused by ion scattering during implantation in highly scaled CMOS technology is explored from a physics and process perspective. Technology computer-aided design (TCAD) simulations together with silicon wafer experiments have been conducted to investigate the impact of this effect. The ion scattering model and TCAD simulations provided a physical understanding of how the internal changes of the MOSFETs are formed. A new compact model for SPICE is proposed using physics-based understanding and has been calibrated using experimental silicon test sets.en_US
dc.language.isoen_USen_US
dc.subjectCMOS wellsen_US
dc.subjecthigh-energy ion implantationen_US
dc.subjection scatteringen_US
dc.subjectMOSFETsen_US
dc.subjectSPICE modelen_US
dc.subjecttechnology computer-aided design (TCAD) simulationen_US
dc.titleModeling the well-edge proximity effect in highly scaled MOSFETsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2006.884070en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume53en_US
dc.citation.issue11en_US
dc.citation.spage2792en_US
dc.citation.epage2798en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000241805300017-
dc.citation.woscount13-
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