完整後設資料紀錄
DC 欄位 | 值 | 語言 |
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dc.contributor.author | Chen, C. C. | en_US |
dc.contributor.author | Kao, H. L. | en_US |
dc.contributor.author | Chin, Albert | en_US |
dc.date.accessioned | 2014-12-08T15:15:40Z | - |
dc.date.available | 2014-12-08T15:15:40Z | - |
dc.date.issued | 2006-10-01 | en_US |
dc.identifier.issn | 0895-2477 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1002/mop.21813 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/11705 | - |
dc.description.abstract | We have studied the electric stress effect on DC-RF performance degradation of 64 gate fingers 0.18-mu m RF MOSFETs. The fresh devices show good transistor's DC to RF characteristics of small sub-threshold swing of 85 mV/dec, large drive current (I-d,I-sat) of 500 mu A/mu m, high unity-gain cut-off frequency (f(t)) of 47 GHz, and low minimum not. se figure (NFmin) of 1.3 dB at 10 GHz. The hot carrier stress for 20% I-d,I-sat reduction causes DC g(m) and r(o) degradation as well as the lower RF current gain by 2.35 dB, f(t) reduction to 35.7 GHz, increasing NFmin to 1.7 dB at 10 GHz and poor output impedance matching. (C) 2006 Wiley Periodicals, Inc. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | stress | en_US |
dc.subject | I-V | en_US |
dc.subject | current gain | en_US |
dc.subject | S parameters | en_US |
dc.subject | NFmin | en_US |
dc.title | Electric stress effect on DC-RF performance degradation of 0.18-mu m mosfets | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1002/mop.21813 | en_US |
dc.identifier.journal | MICROWAVE AND OPTICAL TECHNOLOGY LETTERS | en_US |
dc.citation.volume | 48 | en_US |
dc.citation.issue | 10 | en_US |
dc.citation.spage | 1916 | en_US |
dc.citation.epage | 1919 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000239682100003 | - |
dc.citation.woscount | 0 | - |
顯示於類別: | 期刊論文 |