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dc.contributor.authorLin, YHen_US
dc.contributor.authorLai, CSen_US
dc.contributor.authorLee, CLen_US
dc.contributor.authorLei, TFen_US
dc.contributor.authorChao, TSen_US
dc.date.accessioned2014-12-08T15:02:33Z-
dc.date.available2014-12-08T15:02:33Z-
dc.date.issued1996-07-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/16.502428en_US
dc.identifier.urihttp://hdl.handle.net/11536/1205-
dc.description.abstractNH3-nitridation to create nitrogen-rich layers in-between the stacked layers of the poly-Si gate for pMOS application is proposed and demonstrated. Due to the blocking of fluorine diffusion in the poly-Si gate by the nitrogen-rich layers, the amount of fluorine in the gate oxide, consequently, the fluorine enhancement on boron penetration is reduced. The negative effects of the NH3-nitridized oxide were not found in this work. Moreover, this nitridized stacked poly-Si gate improves significantly the electrical characteristics of the gate oxide as a result of the indirect and slight nitridation at the gate oxide.en_US
dc.language.isoen_USen_US
dc.titleNitridization of the stacked poly-Si gate to suppress the boron penetration in pMOSen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/16.502428en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume43en_US
dc.citation.issue7en_US
dc.citation.spage1161en_US
dc.citation.epage1165en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1996UU61900017-
dc.citation.woscount5-
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