High-performance TFTs with Si nanowire channels enhanced by metal-induced lateral crystallization

doi:10.1109/LED.2006.877708

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Su, CJ	en_US
dc.contributor.author	Lin, HC	en_US
dc.contributor.author	Huang, TY	en_US
dc.date.accessioned	2014-12-08T15:16:17Z	-
dc.date.available	2014-12-08T15:16:17Z	-
dc.date.issued	2006-07-01	en_US
dc.identifier.issn	0741-3106	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/LED.2006.877708	en_US
dc.identifier.uri	http://hdl.handle.net/11536/12075	-
dc.description.abstract	Thin-film transistors with poly-Si nanowire (NW) channels enhanced by metal-induced lateral crystallization (MILC) are reported. The new device features a side-gate with self-aligned NW channels abutting the sidewalls of the gate structure. By adopting the MILC technique, the crystallinity of the NW channels is greatly enhanced, compared to those formed by solid-phase crystallization. As a result, the electrical performance of the devices could be significantly enhanced in terms of reduced subthreshold swing and threshold voltage as well as improved field-effect mobility.	en_US
dc.language.iso	en_US	en_US
dc.subject	metal-induced lateral crystallization (MILC)	en_US
dc.subject	nanowires (NWs)	en_US
dc.subject	thin-film transistors (TFTs)	en_US
dc.title	High-performance TFTs with Si nanowire channels enhanced by metal-induced lateral crystallization	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/LED.2006.877708	en_US
dc.identifier.journal	IEEE ELECTRON DEVICE LETTERS	en_US
dc.citation.volume	27	en_US
dc.citation.issue	7	en_US
dc.citation.spage	582	en_US
dc.citation.epage	584	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000238712200018	-
dc.citation.woscount	21	-
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