Title: | Design on mixed-voltage I/O buffers with consideration of hot-carrier reliability |
Authors: | Ker, Ming-Dou Hu, Fang-Ling 電機學院 College of Electrical and Computer Engineering |
Issue Date: | 2007 |
Abstract: | A new circuit design for mixed-voltage I/O buffers to prevent hot-carrier degradation is proposed. The mixed-voltage (2xVDD tolerant) I/O buffer is designed with hot-carrier-prevented circuits in a 0.18-mu m CMOS process to receive 3.3-V (2xVDD tolerant) input signals without suffering gate-oxide reliability, circuit leakage issues, and hot-carrier degradation. In the experimental chip, the proposed mixed-voltage I/O buffer can be operated with signal speed of up to 266 MHz, which can fully meet the applications of PCI-X 2.0. |
URI: | http://hdl.handle.net/11536/12279 |
ISBN: | 978-1-4244-0582-4 |
Journal: | 2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Proceedings of Technical Papers |
Begin Page: | 36 |
End Page: | 39 |
Appears in Collections: | Conferences Paper |