標題: iAIM: An Intelligent Autonomous Instruction Memory with Branch Handling Capability
作者: Yang, Hui-Chin
Wang, Li-Ming
Chung, Chung-Ping
資訊工程學系
Department of Computer Science
公開日期: 2008
摘要: Goals of this research are to reduce 1. Instruction address bus traffic, 2. Bus power, and 3. Latency, in instruction fetches in a computer system. We propose to move dynamic branch handler from the CPU side to the instruction memory side, and let it be able to autonomously access instructions for CPU CPU needs only to manage the branch handler. Key to success is that the traffic between CPU and dynamic branch handler, with only minor but innovative design changes, can be jar less than that between CPU and instruction memory. The branch handler should hence be capable of PC+4, identifying branches, and tat-get address calculation. We further suggest that even a return stack can easily be incorporated. Simulation using MiBench shows that our theory yields promising results: about 99.98% instruction address traffic and 91.87% related bus bit toggles are reduced.
URI: http://hdl.handle.net/11536/1242
ISBN: 978-1-4244-4198-3
期刊: PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE FOR YOUNG COMPUTER SCIENTISTS, VOLS 1-5
起始頁: 1309
結束頁: 1313
Appears in Collections:Conferences Paper