標題: A double-sided, single-chip integration scheme using through-silicon-via for neural sensing applications
作者: Chang, Chih-Wei
Chou, Lei-Chun
Huang, Po-Tsang
Wu, Shang-Lin
Lee, Shih-Wei
Chuang, Ching-Te
Chen, Kuan-Neng
Hwang, Wei
Chen, Kuo-Hua
Chiu, Chi-Tsung
Tong, Ho-Ming
Chiou, Jin-Chern
交大名義發表
National Chiao Tung University
關鍵字: Through silicon via;CMOS technology Neural probe array;Electrode;Heterogeneous integration
公開日期: 1-Feb-2015
摘要: We present a new double-sided, single-chip monolithic integration scheme to integrate the CMOS circuits and MEMS structures by using through-silicon-via (TSV). Neural sensing applications were chosen as the implementation example. The proposed heterogeneous device integrates standard 0.18 mu m CMOS technology, TSV and neural probe array into a compact single chip device. The neural probe array on the back-side of the chip is connected to the CMOS circuits on the front-side of the chip by using low-parasitic TSVs through the chip. Successful fabrication results and detailed characterization demonstrate the feasibility and performance of the neural probe array, TSV and readout circuitry. The fabricated device is 5x5 mm(2) in area, with 16 channels of 150 mu m-in-length neural probe array on the back-side, 200 mu m-deep TSV through the chip and CMOS circuits on the front-side. Each channel consists of a 5x6 probe array, 3x14 TSV array and a differential-difference amplifier (DDA) based analog front-end circuitry with 1.8 V supply, 21.88 mu W power consumption, 108 dB CMRR and 2.56 mu Vrms input referred noise. In-vivo long term implantation demonstrated the feasibility of presented integration scheme after 7 and 58 days of implantation. We expect the conceptual realization can be extended for higher density recording array by using the proposed method.
URI: http://dx.doi.org/10.1007/s10544-014-9906-9
http://hdl.handle.net/11536/124349
ISSN: 1387-2176
DOI: 10.1007/s10544-014-9906-9
期刊: BIOMEDICAL MICRODEVICES
Volume: 17
Appears in Collections:Articles