標題: | A Low THD Clock-Free Class-D Audio Amplifier with an Increased Damping Resistor and Cross Offset Cancellation Technique |
作者: | Chou, Ying-Wei Chien, Meng-Wei Chen, Shin-Chieh Chen, Ke-Horng Lin, Ying-Hsi Tsai, Tsung-Yen Huang, Chen-Chih Lee, Chao-Cheng Tai, Zhih Han Cheng, Yi Hsuan Tsai, Chi Chung Luo, Hsin-Yu Wang, Shih-Ming Chen, Long-Der Yang, Cheng-Chen Hui, Huang Tian 電控工程研究所 Institute of Electrical and Control Engineering |
關鍵字: | self-oscillating;audio amplifier;Class-D audio amplifier;mobile application;offset cancellation;clock-free |
公開日期: | 1-一月-2014 |
摘要: | an increased damping resistor (IDR) replaces high-order loop filter to simply reduce the total harmonic distortion (THD) of Class-D audio amplifier. Besides, cross offset cancellation (COC) technique minimizes the system offset voltage to avoid dc current flows to the speaker in the bridge tied load (BTL) structure. Furthermore, variable switching frequency characteristic in self-oscillating modulation spreads the electro-magnetic interference (EMI) impact out on the output frequency spectrum. Experimental results demonstrate that the proposed Class-D amplifier can deliver 0.55W to the 8 Omega load with a 3.3V supply voltage with 150-nm CMOS process. The power efficiency is over 90% and the output THD is smaller than 0.01% (80dB). |
URI: | http://hdl.handle.net/11536/124910 |
ISBN: | 978-1-4799-3432-4 |
ISSN: | 0271-4302 |
期刊: | 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) |
起始頁: | 2680 |
結束頁: | 2683 |
顯示於類別: | 會議論文 |