以LLVM 為基礎的可重定目標混和型二元碼轉譯器之x87指令集架構與ARM目標系統的支援

Abstract

混和型二元碼轉譯是結合了動態二元碼轉譯以及靜態二元碼轉譯的一種技術，而HBT-86是一個針對x86-32指令集架構以LLVM為基礎所開發的可重定目標之混和型二元碼轉譯系統。其支援的指令集為x86-32整數指令以及部份SSE2的SIMD (單指令流多資料流) 整數指令，並且可以產生x86 (x86-32以及x86-64) 的目標執行檔。然而，許多x86-32執行檔裡包含了一些浮點數指令，造成HBT-86無法成功的轉譯這些執行檔;且HBT-86缺少對其他目標系統 (非x86系統) 的支援。因此，本篇論文的研究目標主要為提供HBT-86浮點數指令集的支援，以及ARM目標系統的支援。此外，本研究也修改了部分HBT-86的實作方法，以改善其產生之目標執行檔的效能。在x86-32至x86-64的擬真之實驗結果中，對於SPEC2006 CINT Benchmark，我們延伸的HBT-86之擬真的效能是QEMU的3.24倍，對於SPEC2006 CFP Benchmark，其擬真效能是QEMU的11.89倍;在x86-32至ARM的擬真之實驗結果中，對於SPEC2006 CINT Benchmark，我們延伸的HBT-86之擬真的效能是QEMU的3.16倍，對於SPEC2006 CFP Benchmark，其擬真效能是QEMU的1.54倍。

Hybrid binary translation (HBT) is a binary translation technology, which is the combination of static binary translation and dynamic binary translation. The HBT-86 is an LLVM based retargetable HBT system for x86 instruction set architecture (ISA). For the previous HBT-86, the front-end supports only the x86-32 integer and a part of SIMD integer instruction set, and the back-end supports only the x86-32 and x86-64 target platforms. However, there are many x86 programs which contain the floating-point instructions so that the previous HBT-86 can not translate these programs successfully. Moreover, the previous HBT-86 lacks of the different target systems support. In this thesis, we extend the previous HBT-86 to support the x87 floating-point related instruction set and the target system for ARM ISA. Furthermore, we make some modifications for HBT-86 to improve the emulation performance of the target executable files generated by it. In our x86-32 to x86-64 emulation experiments, our HBT-86 is about 3.24 and 11.89 times faster than QEMU for SPEC2006 CINT and SPEC2006 CFP benchmark, respectively. For the x86-32 to ARM emulation, our HBT-86 is about 3.16 and 1.54 times faster than QEMU for SPEC2006 CINT and SPEC2006 CFP benchmark, respectively.