標題: 適用於高速嵌入式記憶體之高速及低功率消耗數位式降壓電路
An Ultra-fast Response and Low Power Consumption Digital Low Dropout Regulator for High Speed embedded Memory Applications
作者: 陳瑞隆
Chen, Jui-Lung
陳科宏
劉志尉
Chen, Ke-Horng
Liu, Chih-Wei
電機學院電機與控制學程
關鍵字: 數位式降壓電路;嵌入式記憶體;低功率;Digital LDO;embedded memory;low power
公開日期: 2015
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT079967510
http://hdl.handle.net/11536/126393
Appears in Collections:Thesis