基於全系統模擬以研究系統行為對記憶體階層架構的影響之探索

Abstract

記憶體的存取速度早已成為電腦架構上的效能瓶頸，一個有效率的記憶階層可以使得記憶體了存取速度加快，以減緩這個效能的瓶頸。由於記憶體的使用和作業系統是息息相關的，所以在探索記憶體階層的改善時，同時觀察作業系統和硬體的架構是不可或缺的。但是作業系統的研究和硬體架構的研究有著一道鴻溝，導致軟體和硬體之間不良的溝通。在本論文中，提出了一個基於全系統模擬的分析架構，能夠連結軟體和硬體之間的資訊，以做到在記憶體階層上更深入的研究。我們提出了一個輕量級的系統追蹤工具來取得軟體上的系統訊息，並且整合到從硬體監視器中取得硬體的資訊。藉著全系統的資訊，我們提出新的觀點來找出記憶體階層的問題所在，並且給出一些建議使得未來的設計可以得到調整。

The Memory-Wall causes the overwhelming bottleneck in computer performance. An efficient memory hierarchy is designed to alleviate the memory latency. The memory usage and operating system are closely related, but there is a growing gap between architectural research and OS research. In this thesis, we propose a novel analysis framework to connect the OS behavior and the hardware architecture based on full-system simulation so that we can explore the impact of system behavior on memory hierarchy. We proposed a lightweight event catcher to trace the system event. By combining the system event with hardware information, which is obtained from hardware monitor in the QEMU, we can not only obtain the full-system trace but also these important OS kernel events that are correctly interleaved in the memory trace. The advantages of our approach includes a detailed memory evaluation study can be performed from perspective of operating system events. To demonstrate our platform, we analyzed the memory system behavior with some new observations in spatial domain and temporal domain. According to the observation results, we provide several recommendations for the adjustment in the future design.