應用於窄邊框顯示器之雙向傳輸閘極驅動電路陣列技術

Abstract

隨著科技產業的演進，應用在電視、電腦螢幕、手機上的液晶顯示器(Liquid Crystal Display, LCD)已經扮演著非常重要的角色。近年來，智慧行動裝置蓬勃發展，在行動裝置的顯示技術上逐漸追求更細緻的畫面呈現，與更大的顯示畫面，為了實現這樣的需求，市場逐漸聚焦於「高解析度」、「窄邊框」等關鍵技術在平面顯示器的應用。 將面板驅動系統中的閘極驅動電路(gate driver)製程整合在面板周邊的「閘極驅動電路陣列技術」，已成為目前液晶顯示器技術發展的趨勢。閘極驅動電路的基本原理是提供序列式的方波訊號來打開畫素內的開關元件，進而使得資料驅動電路(Data Driver)輸送電壓資料到相對應的畫素電容裡，產生一連串的連續畫面。在傳統的顯示面板中，閘極驅動IC晶片(由單晶矽晶圓製程所製造)必須透過封裝與顯示基板進行貼合,此封裝貼合過程必須使用金屬線作連接，而這些金屬線會增加繞線的困難度，以及金屬貼合時所產生的誤差，造成製作面板良率的下降。而GOA (Gate driver On Array)的技術，就是在此時因蘊而生。GOA技術將傳統面板側邊的閘極驅動電路移除，改為製作到面板的玻璃基板上，此方式的好處為有效的縮減面板側邊所需的寬度、減少IC的使用數量可以降低成本，也減少金屬繞線所產生的製程誤差。 本論文提出二種可應用於高解析度(FHD)液晶顯示器的閘極驅動電路陣列技術，都具備雙向傳輸功能以因應智慧型電子裝置在不同方向的畫面呈現。第一種為適用在中大尺寸窄邊框顯示器的閘極驅動電路，使用交流驅動反相器(AC-driven Inverter)搭配節點共用(Node Sharing)機制，設計出具備全時段 (Full Time Noise-free)雜訊抑制機制的閘極驅動電路。除此之外，此電路在四相時序訊號的操作中實現單一充放電路徑(Single Path Condition)、無電容(Capacitor-free)設計與驅動時脈同步控制裝置(Driving Clock Controlled Device)來節省元件數量，達到窄邊框的目的。第二種為適用在小尺寸極窄邊框顯示器的閘極驅動電路，同樣使用節點共用(Node Sharing)機制節省元件數量，並提出更精簡的抑制雜訊架構(Clock Controlled Noise-free Structure)來達到極窄邊框的目標。

Over the last decade or more, high resolution and narrow-bezel liquid crystal display became the main stream in active-matrix liquid crystal display (AMLCD) technology. However, higher resolution means more pixels in the panel, which lead to more gate driver ICs requirement. The routing between the gate driver ICs and the panel would block the development in narrow bezel display. In order to overcome this issue, the integrated gate driver circuit on glass substrate is invented to replace the function of conventional gate driver ICs, called gate driver on array (GOA). Hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) are used to design the GOA circuit in this work. The reason why a-Si:H TFTs are chosen is described as follow: (1) Low-temperature process (<350℃) would achieves the destiny of cost reduction. (2) High uniformity of amorphous silicon thin film transistors in active layer assure the quality of the fabricated panel. This thesis proposes two kinds of bi-directional transmissible gate drivers for different a-Si:H TFT LCD application. First one is for medium-large size flat panel application, which utilized alternatively operated “AC-driven inverter” for full time noise-free in non-working state. Using four phase clock signals for single path condition. Employing “driving clock controlled device” and “capacitor-free design” for less devices, “Node sharing mechanism” for area reduction. The second gate driver is for small size flat panel application, “clock controlled noise-free structure” further eliminate the devices, and the concise design successfully reduces the border of the gate driver to 0.95mm.