低熱預算非晶矽應用於光伏元件及非揮發性記憶體之製作

Abstract

隨著具高密度、高操作速度、低功耗及多功能異質晶片整合的需求成長，系統面板(System on Panel, SoP)及三維垂直整合(Monolithic 3D integration)將是未來晶片整合發展的趨勢。由於傳統的高熱預算製程技術，無法應用於玻璃系統面板整合及矽基板三維垂直堆疊，因此具低熱預算製程技術與元件的開發，將成為主要的核心發展技術。在本研究中，將深入探討應用於太陽能電池及電晶體的低熱預算非晶矽材料特性，同時開發及整合光補捉、電漿薄膜沈積、雷射結晶及雷射活化等低熱預算製程，用於氫化非晶矽薄膜太陽能電池及多晶矽場效電晶體/非揮發性記憶體之製作。 在低熱預算薄膜太陽能電池方面，利用感應耦合電漿(140-200 oC)製作高效率n-i-p及p-i-n氫化非晶矽薄膜太陽能電池，於n-i-p薄膜太陽能電池上電極，引入次微米(0.4 μm)二氧化矽粒子自組裝層(65 % 填充密度)作為光捕捉層，增加紫外-可見光(UV-visible)波段的光捕捉效率及光電轉換效率達8.5 %，此外，二氧化矽粒子自組裝層也同時發揮了高角度抗反射特性；在p-i-n薄膜太陽能電池中則是採用FTO/Au-NPs/AZO疊層式電極，降低介面與吸收層缺陷，改善紫外-藍光波段的光退化特性，以及利用表面電漿效應於綠光-紅光波段增強光捕捉特性；進而提升光電轉換效率達10.1 %及降低長時間光照退化率僅7 %。 在低熱預算場效電晶體及電荷儲存非揮發性記憶體方面，以綠光尖峰退火雷射結晶，將感應耦合電漿沈積的非晶矽薄膜(375oC)轉變為多晶矽薄膜，並將多晶矽薄膜通道層減薄至14奈米， 結合high-κ/metal gate (Al2O3/TiN)及遠紅外光雷射(CO2, 10.6 μm)退火，製作具50奈米金屬閘極的P型及N型多晶矽場效電晶體，可展現出高驅動電流(121 and 62 A/m)、低次臨界擺幅(88 and 121 mV/dec.)與低臨界電壓(0.7 and -0.3 V)。除此之外，更進一步結合低溫能隙調變介電層至低熱預算場效電晶體中，製作具可後段相容的metal/SiO2/Si-rich SiNx/AlOxNy/SiO2/Si (MONAOS)電荷儲存式非揮發性記憶體，展現較低的操作電壓(9 V)、低電荷損失(16 %)及穩定的耐久性。 透過本研究所開發的低熱預算材料、製程與元件，未來將可有廣泛應用於二維系統面板整合、三維垂直堆疊晶片與物聯網。

The demand for system on panel (SoP) and monolithic 3D integration is increasing for realizing devices with high density and operation speed and low power consumption to fabricate future chip integration. However, the conventional high thermal processes constrain this realization; thus developing low thermal budget processes is essential. In this thesis, we investigated the material characteristics of low thermal budget amorphous Si (a-Si) thin-film for fabrication of low thermal budget photovoltaics and field effect transistors. Furthermore, we developed and integrated low thermal budget processes, such as light-trapping structures, plasma-deposited thin film, laser crystallization, and laser activation, to fabricate hydrogenated a-Si (a-Si:H) thin-film solar cells, poly-Si field-effect transistors (FETs), and charge-trap non-volatile memories (CTNVMs). For low thermal budget thin-film solar cells, highly efficient n-i-p and p-i-n a-Si:H thin-film solar cells were fabricated through inductively coupled plasma chemical vapor deposition at 140-200oC. The light-trapping capability of the n-i-p solar cells increased in the ultraviolet (UV)-visible region and a conversion efficiency of 8.5% was achieved, when the cells were incorporated with sub-micron (0.4 μm in diameter) self-assembly loosely-packed silica spheres (LPSS) monolayers (65% fill density). The LPSS monolayer behaves like a nearly omnidirectional antireflector and increases the solar efficiency at high incident angle of illumination. Incorporating the FTO/Au-NPs/AZO electrode in p-i-n thin-film solar cells imparted the light-trapping capability in the green-red band because of the plasmonic effect and resistance to photodegradation in the UV-blue band, which was due to the low defect of the p-/i-layer interface and intrinsic layer. This phenomenon substantially increased the conversion efficiency to 10.1% and reduced the photodegradation to 7%. For low thermal budget field effect transistor and non-volatile memories, green nanosecond laser spike annealing was used to transform a-Si to poly-Si, the thickness of which was reduced to 14 nm. Low temperature n- and p-FETs were fabricated by integrating a thin poly-Si channel, high-κ/metal gate (Al2O3/TiN) and far-infrared laser activation to obtain a high on-current (121 and 62 A/m, respectively), low subthreshold swing (88 and 121 mV/dec., respectively), and low threshold voltage (0.7 and 0.3 V, respectively). In addition, a metal/SiO2/Si-rich SiNx/AlOxNy/SiO2/Si CTNVM with a low thermal budget was implemented by combining low thermal budget field effect transistor with nano-scale to obtain a low operation voltage, low charge loss, and reliable endurance. These low thermal budget materials, processes and devices can be widely used in SoP, 3D integration, and Internet of Things.