完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 黃宣銘 | en_US |
dc.contributor.author | Huang, Hsuan-Ming | en_US |
dc.contributor.author | 溫宏斌 | en_US |
dc.date.accessioned | 2015-11-26T01:02:51Z | - |
dc.date.available | 2015-11-26T01:02:51Z | - |
dc.date.issued | 2015 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT070080702 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/127711 | - |
dc.description.abstract | 隨著製程不斷的縮小,針對產品可靠度的議題顯得更富有可挑戰性。在電路上會有發生錯誤的可能,我們將錯誤主要歸為兩類,一類為不可逆不可變的永久性錯誤,而另一類為有時發生有時不發生的暫態錯誤。在這深次微米技術的時代裡,由於環境中的宇宙射線,深深地影響了半導體產品的可靠度。導致軟性錯誤已經成為先進製程中對於錯誤發生率不可忽視且有著舉足輕重地位的電子特性之一了。 在先前的製程技術中,軟性電子錯誤率對於記憶體設計的影響比較大,但當製程若縮小至100 奈米以下,邏輯電路將再也不能忽視軟性電子錯誤的重要性了。因此,在這篇論文中,我們首先在元件層級分析了在深次微米下各種軟性電子錯誤中的進階效應,包含了粒子擊中時間、多周期效應、多暫態錯誤效應以及考慮動態電壓之影響,並且在電路層級中,對於每種效應提出了相對應的軟性電子錯誤估算平台。實驗結果顯示,如果不考慮粒子擊中時間和多周期效應的話,將會有38.45%的誤差,再者,如果忽略了多暫態錯誤效應的話,將會有16%的誤差,最後,如果只考慮靜態的電壓的話,所估計之收集電荷數將會比考慮動態電壓多出50%。總結來說,如果忽略了以上所提及之效應的話,將會導致軟性電子錯誤估算有著嚴重的偏差。 | zh_TW |
dc.description.abstract | Along with technology scaling, circuit reliability is becoming more challenging than ever. Errors that jeopardize circuit reliability can be classified based on their occurrences in different operating scenarios into (1) permanent faults which are associated with permanent damages to the device and (2) transient faults which appear under temporary scenarios. Beyond deep sub-micron era, environmental radiation results in more impact on semiconductor devices. Soft errors have emerged to be one of the dominant failure mechanisms in modern CMOS technologies. Concerns with soft errors appearing in memory units have been discussed for a period of time. However, as process technology scales below 100 nm and operating frequencies increase, soft errors are also becoming a commonplace for logic circuits as well. Hence, in this dissertation, we first analyze some advanced soft error effects, including the striking time and multi-cycle effects, multiple transient faults effect and dynamic voltage effect, on soft error estimation in device level. A series of frameworks were proposed to accurately and efficiently compute the soft error rate considering each effect in circuit level. Experimental results show that it vital to consider all of the effects otherwise significant inaccuracies will be introduced. Compared with the soft error estimation with and without striking time and multi-cycle effects, the soft error difference is 38.45% in average. Neglecting multiple transient faults effect will cause 16% of underestimation in soft error estimation. The estimation for collected charge will be 50% more pessimistic if the dynamic voltage effect is ignored. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 軟性電子錯誤 | zh_TW |
dc.subject | 可靠度分析 | zh_TW |
dc.subject | soft error | en_US |
dc.subject | reliability | en_US |
dc.title | 軟性電子錯誤之進階效應分析-從元件層級到電路層級 | zh_TW |
dc.title | Soft Error Analysis of VLSI Designs considering Advanced Effects – from Device to Circuit Level | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電機工程學系 | zh_TW |
顯示於類別: | 畢業論文 |