標題: Design, Fabrication and Characterization of Low-Noise and High-Reliability Amorphous Silicon Gate Driver Circuit for Advanced FPD Applications
作者: Chiang, Chien-Hsueh
Li, Yiming
傳播研究所
電機資訊學士班
Institute of Communication Studies
Undergraduate Honors Program of Electrical Engineering and Computer Science
關鍵字: Amorphous silicon gate (ASG) driver circuits;frequency;output noises;output ripples;pull-down signal;reliability;temperature;thin-film transistors (TFTs);threshold voltage shift
公開日期: 1-Aug-2015
摘要: We report a novel design of amorphous silicon gate (ASG) driver circuit with not only low output noises but also improved reliability. The ASG circuits are made of thin-film transistors (TFTs) and integrated in the substrate glass. Unlike the most traditional ASG circuits, the proposed pull-down signals are complementary with lower frequency to discharge the critical nodes in the proposed circuit. The new pull-down signals are created to discharge each two adjacent stage circuits. By inputting two controlled pulse signals, the prospective pull-down signals can be created eventually in the circuit. To simulate the real driving conditions, a string of a resistance (1.24 k Omega) and a capacitance (85.5 pF) are connected to each output as loading. By probing the output pads of the real circuit sample, the output characteristics can practicably be measured. In particular, the output ripples can be suppressed to 0.28 V. Moreover, the measured threshold voltage (V-th)shift with two stressing signals at different frequencies reveals the significant difference. The measured V-th shift after 12 h of the clock stressing with lower frequency (167 Hz) is about 12% slower speed than that of the stressing clock with higher frequency (16.7 kHz) under the high temperature (60 degrees C).
URI: http://dx.doi.org/10.1109/JDT.2014.2387880
http://hdl.handle.net/11536/127996
ISSN: 1551-319X
DOI: 10.1109/JDT.2014.2387880
期刊: JOURNAL OF DISPLAY TECHNOLOGY
Volume: 11
起始頁: 633
結束頁: 639
Appears in Collections:Articles