標題: Circuit-Simulation-Based Multi-Objective Evolutionary Algorithm for Design Optimization of a-Si:H TFTs Gate Driver Circuits Under Multilevel Clock Driving
作者: Hung, Sheng-Chin
Chiang, Chien-Hsueh
Li, Yiming
傳播研究所
電機資訊學士班
Institute of Communication Studies
Undergraduate Honors Program of Electrical Engineering and Computer Science
關鍵字: Amorphous silicon gate driver circuits;a-Si:H TFTs;display panel design optimization;dynamic characteristic;fall time;multi-objective evolutionary algorithm (MOEA);unified optimization framework (UOF)
公開日期: 1-Aug-2015
摘要: This work optimizes dynamic characteristic of a new amorphous silicon gate (ASG) driver circuit using multi-objective evolutionary algorithm (MOEA) and hydrogenated amorphous silicon (a-Si:H) TFT circuit simulator running on the platform of unified optimization framework (UOF). The ASG driver circuit consisting of 17 a-Si:H TFTs is optimized for the given specifications of the fall time <3 mu s and the ripple voltage < - 9 V while simultaneously minimizing the total layout area. More than 50% reductions on the fall time of the ASG driver circuit have been achieved by using the optimization methodology together with a novel three-level clock driving technique. The measured results of the fabricated sample using the optimized parameters confirm the practicability of reported MOEA methodology.
URI: http://dx.doi.org/10.1109/JDT.2015.2390653
http://hdl.handle.net/11536/127997
ISSN: 1551-319X
DOI: 10.1109/JDT.2015.2390653
期刊: JOURNAL OF DISPLAY TECHNOLOGY
Volume: 11
起始頁: 640
結束頁: 645
Appears in Collections:Articles