標題: Categorization of Multilevel-Cell Storage-Class Memory: An RRAM Example
作者: Liu, Jen-Chieh
Hsu, Chung-Wei
Wang, I-Ting
Hou, Tuo-Hung
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Multilevel-cell (MLC);resistive random access memory (RRAM);write scheme
公開日期: 1-八月-2015
摘要: This paper provides new insights into the effect of device characteristics on multilevel-cell (MLC) operation, aiming at potential benefits, such as the reduction of write latency and peripheral circuit design overhead. A general categorization of the MLC-operating schemes in storage-class memory (SCM) is proposed to connect the total number of write inputs with fundamental device properties. The categorization method is validated using two resistive random access memory devices based on different switching mechanisms. Favorable device characteristics and the corresponding simplified MLC operating schemes are addressed to facilitate future development of MLC SCM.
URI: http://dx.doi.org/10.1109/TED.2015.2444663
http://hdl.handle.net/11536/128009
ISSN: 0018-9383
DOI: 10.1109/TED.2015.2444663
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 62
起始頁: 2510
結束頁: 2516
顯示於類別:期刊論文