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dc.contributor.authorLin, Chia-Lungen_US
dc.contributor.authorChen, Chih-Lungen_US
dc.contributor.authorChang, Hsie-Chiaen_US
dc.contributor.authorLee, Chen-Yien_US
dc.date.accessioned2015-12-02T02:59:29Z-
dc.date.available2015-12-02T02:59:29Z-
dc.date.issued2015-10-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2015.2471575en_US
dc.identifier.urihttp://hdl.handle.net/11536/128258-
dc.description.abstractIn this paper, a design approach for architecture-aware nonbinary low-density parity-check convolutional codes (NB-LDPC-CCs) is presented to jointly optimizes the code performance and decoder complexity for achieving high energy-efficiency decoder. The proposed NB-LDPC-CCs not only feature simple structure and low degree, but also compete with other published NB-LDPC-CCs on error-correction capability. With these codes, we present a memory-based layered decoder architecture, where the computation units and the scheduling of the computations are optimized to increase energy efficiency. To demonstrate the feasibility of proposed techniques, a time-varying (50,2,4) NB-LDPC-CC over GF(256) is constructed, and associated decoder is implemented in 90 nm CMOS. The code can reach BER = 10(-5) at SNR = 0.9 dB, and support multi code rates with puncturing. Comparing with the state-of-the-art designs, the proposed decoder can save 74% power under the same number of iterations, making it suitable for emerging Internet of Things (IoT) applications.en_US
dc.language.isoen_USen_US
dc.subjectConvolutional codesen_US
dc.subjecterror correctionen_US
dc.subjectnonbinary low-density parity-check (NB-LDPC) convolutional codesen_US
dc.subjectVLSIen_US
dc.titleJointly Designed Nonbinary LDPC Convolutional Codes and Memory-Based Decoder Architectureen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2015.2471575en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume62en_US
dc.citation.issue10en_US
dc.citation.spage2523en_US
dc.citation.epage2532en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000362041100016en_US
dc.citation.woscount0en_US
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