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dc.contributor.authorJiang, IHRen_US
dc.contributor.authorPan, SRen_US
dc.contributor.authorChang, YWen_US
dc.contributor.authorJou, JYen_US
dc.date.accessioned2014-12-08T15:17:44Z-
dc.date.available2014-12-08T15:17:44Z-
dc.date.issued2006-01-01en_US
dc.identifier.issn1084-4309en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.tsf.2005.12.184en_US
dc.identifier.urihttp://hdl.handle.net/11536/12874-
dc.description.abstractAs technology advances apace, crosstalk becomes a design metric of comparable importance to area and delay. This article focuses mainly on the crosstalk issue, specifically on the impacts of physical design and process variation on crosstalk. While the feature size shrinks below 0.25 mu m, the impact of process variation on crosstalk increases rapidly. Hence, a crosstalk insensitive design is desirable in the deep submicron regime. In this article, crosstalk sensitivity is referred to as the influence of process variation on crosstalk in a circuit. We show that the lower bound of crosstalk sensitivity grows quadratically, while that of crosstalk increases linearly. Therefore, designers should also consider crosstalk sensitivity, when optimizing other design objectives such as crosstalk, area, and delay. According to our modeling, these objectives are all in posynomial forms, and thus the multiobjective optimization problem can optimally be solved by Lagrangian relaxation. Experimental results show that our method is effective and efficient. For instance, a circuit of 2856 gates and 5272 wires is optimized using 13-minute runtime and 2.8-MB memory on a Pentium III 1.0 GHz PC with 256-MB memory. In particular, by relaxing Lagrange multipliers to the critical paths, it takes only two iterations for all solutions to converge to the global optimal, which is much more efficient than related previous work. This relaxation scheme provides a key insight into the rapid convergence in Lagrangian relaxation.en_US
dc.language.isoen_USen_US
dc.subjectalgorithmsen_US
dc.subjectperformanceen_US
dc.subjectVLSIen_US
dc.subjectinterconnecten_US
dc.subjectpost-layout optimizationen_US
dc.subjectlagrangian relaxationen_US
dc.titleReliable crosstalk-driven interconnect optimizationen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.tsf.2005.12.184en_US
dc.identifier.journalACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMSen_US
dc.citation.volume11en_US
dc.citation.issue1en_US
dc.citation.spage88en_US
dc.citation.epage103en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000236871100006-
dc.citation.woscount1-
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