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dc.contributor.authorHuang, Wen-Hsienen_US
dc.contributor.authorShieh, Jia-Minen_US
dc.contributor.authorPan, Fu-Mingen_US
dc.contributor.authorYang, Chih-Chaoen_US
dc.contributor.authorShen, Chang-Hongen_US
dc.contributor.authorWang, Hsing-Hsiangen_US
dc.contributor.authorHsieh, Tung-Yingen_US
dc.contributor.authorWu, Ssu-Yuen_US
dc.contributor.authorWu, Meng-Chyien_US
dc.date.accessioned2016-03-28T00:04:11Z-
dc.date.available2016-03-28T00:04:11Z-
dc.date.issued2015-11-02en_US
dc.identifier.issn0003-6951en_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.4935224en_US
dc.identifier.urihttp://hdl.handle.net/11536/129389-
dc.description.abstractWe fabricated charge-trap non-volatile memories (NVMs) using low thermal budget processes, including laser-crystallization of poly-Si thin film, chemical vapor deposition deposition of a stacked memory layer, and far-infrared-laser dopant activation. The thin poly-Si channel has a low defect-density at the interface with the bulk, resulting in a steep subthreshold swing for the NVM transistors. The introduction of the stacked SiO2/AlOxNy tunnel layer and the SiNx charge-trap layer with a gradient bandgap leads to reliable retention and endurance at low voltage for the NVMs. The low thermal budget processes are desirable for the integration of the nano-scaled NVMs into system on panels. (C) 2015 AIP Publishing LLC.en_US
dc.language.isoen_USen_US
dc.titleCharge-trap non-volatile memories fabricated by laser-enabled low-thermal budget processesen_US
dc.typeArticleen_US
dc.identifier.doi10.1063/1.4935224en_US
dc.identifier.journalAPPLIED PHYSICS LETTERSen_US
dc.citation.volume107en_US
dc.citation.issue18en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.identifier.wosnumberWOS:000364580800062en_US
dc.citation.woscount0en_US
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