標題: Potential of Enhancement Mode In0.65Ga0.35As/InAs/In0.65Ga0.35As HEMTs for Using in High-Speed and Low-Power Logic Applications
作者: Fatah, Faiz Aizad
Lin, Yueh-Chin
Lee, Tsung-Yun
Yang, Kai-Chun
Liu, Ren-Xuan
Chan, Jing-Ray
Hsu, Heng-Tung
Miyamoto, Yasuyuki
Chang, Edward Yi
材料科學與工程學系
照明與能源光電研究所
電子工程學系及電子研究所
Department of Materials Science and Engineering
Institute of Lighting and Energy Photonics
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-Jan-2015
摘要: In this study, a 60-nm enhancement-mode (E-mode) In0.65Ga0.35As/InAs/In0.65Ga0.35As high electron mobility transistor (HEMT) was developed, and its potential for use inhigh-speed and low-power logic applications was investigated. When the E-mode device was biased at a drain-source voltage of 0.5 V, it demonstrated a cutoff frequency of 169 GHz, drain-induced barrier lowering of 70 mV/V, minimum subthreshold swing of 67 mV/decade, and ION/IOFF ratio greater than 1.6 x 10(4). The high performance of the E-mode device is attributed to the use of a thin barrier layer along with Pt gate sinking technology. These results confirm that E-mode In0.65Ga0.35As/InAs/In0.65Ga0.35As HEMTs have great potential for use inhigh-speed and low-power logic applications. (C) 2015 The Electrochemical Society. All rights reserved.
URI: http://dx.doi.org/10.1149/2.0171512jss
http://hdl.handle.net/11536/129447
ISSN: 2162-8769
DOI: 10.1149/2.0171512jss
期刊: ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY
Issue: 12
起始頁: N157
結束頁: N159
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