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dc.contributor.authorPan, Gung-Yuen_US
dc.contributor.authorYang, Jeden_US
dc.contributor.authorJou, Jing-Yangen_US
dc.contributor.authorLai, Bo-Cheng Charlesen_US
dc.date.accessioned2016-03-28T00:04:19Z-
dc.date.available2016-03-28T00:04:19Z-
dc.date.issued2015-12-01en_US
dc.identifier.issn1539-9087en_US
dc.identifier.urihttp://dx.doi.org/10.1145/2811404en_US
dc.identifier.urihttp://hdl.handle.net/11536/129551-
dc.description.abstractMultiprocessors have become the main architecture trend in modern systems due to the superior performance; nevertheless, the power consumption remains a critical challenge. Global power management (GPM) aims at dynamically finding the power state combination that satisfies the power budget constraint while maximizing the overall performance (or vice versa). Due to the increasing number of cores in a multiprocessor system, the scalability of GPM policies has become critical when searching satisfactory state combinations within acceptable time. This article proposes a highly scalable policy based on combinatorial optimization with theoretical proofs, whereas previous works take exhaustive search or heuristic methods. The proposed policy first applies an optimum algorithm to construct a state combination table in pseudo polynomial time using dynamic programming. Then, the state combination is assigned to cores with minimum transition cost in linear time by mapping to the network flow problem. Simulation results show that the proposed policy achieves better system performance for any given power budget when compared to the state-of-the-art heuristic. Furthermore, the proposed policy demonstrates its prominent scalability with 125 times faster policy runtime for 512 cores.en_US
dc.language.isoen_USen_US
dc.subjectAlgorithmsen_US
dc.subjectDesignen_US
dc.subjectManagementen_US
dc.subjectPerformanceen_US
dc.subjectCombinatorial optimizationen_US
dc.subjectDVFSen_US
dc.subjectmultiprocessor systemsen_US
dc.titleScalable Global Power Management Policy Based on Combinatorial Optimization for Multiprocessorsen_US
dc.typeArticleen_US
dc.identifier.doi10.1145/2811404en_US
dc.identifier.journalACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMSen_US
dc.citation.volume14en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000367206600010en_US
dc.citation.woscount0en_US
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