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dc.contributor.authorTsui, BYen_US
dc.contributor.authorLin, CPen_US
dc.date.accessioned2014-12-08T15:18:05Z-
dc.date.available2014-12-08T15:18:05Z-
dc.date.issued2005-11-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2005.857178en_US
dc.identifier.urihttp://hdl.handle.net/11536/13082-
dc.description.abstractA novel modified Schottky barrier p-channel FinFET (MSB FinFET) has been successfully demonstrated previously. In this paper, the detailed process conditions, especially the formation of MSB junctions, has been presented. Device characteristics as well as the geometry effect are also discussed extensively. In the MSB FinFETs fabricated by the two-step silicidation and implant-to-silicide techniques (ITS), an ultrashort and defect-free source/drain extension (SDE) could be formed at a temperature as low as 600 degrees C, resulting in excellent electrical characteristics. The ultrashort SDE could effectively thin out the SB width between source/channel during on-state or broaden and elevate it between drain/channel during off-state. A leakage mechanism of MSB FinFETs similar to the conventional ones was identified by the activation energy analysis. Strong fin width dependence of the electrical characteristics was also found in the proposed devices. When the fin width becomes larger than the silicide grain size, the multigrain structure results in a rough front edge of the MSB junction, which in turn degrades the short-channel device performance. This result indicates that the MSB device is suitable for use as FinFET. The low thermal budget of the MSB FinFET relaxes the thermal stability issue for metal gate/high-k, dielectric integration. It is considered that the proposed MSB FinFET is a very promising nanodevice.en_US
dc.language.isoen_USen_US
dc.subjectFinFETen_US
dc.subjectimplant-to-silicide (ITS)en_US
dc.subjectSchottky barrier (SB)en_US
dc.subjectsilicon-on-insulator (SOI)en_US
dc.titleProcess and characteristics of modified Schottky barrier (MSB) p-channel FinFETsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2005.857178en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume52en_US
dc.citation.issue11en_US
dc.citation.spage2455en_US
dc.citation.epage2462en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000232898200014-
dc.citation.woscount21-
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