完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 張翼 | zh_TW |
dc.date.accessioned | 2016-12-20T03:56:41Z | - |
dc.date.available | 2016-12-20T03:56:41Z | - |
dc.date.issued | 2016 | en_US |
dc.identifier.govdoc | 1052001INER008 | zh_TW |
dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=11824365&docId=483228 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/131749 | - |
dc.description.abstract | 半導體產業發展至今,在線寬不斷的縮小之下,要依照莫爾定律每18個月就向上演化一個世代日益困難。而3D IC便是幫助半導體產業追隨莫爾定律的一大製程演化。3D IC中,最主要的四大技術分別為,TSV (Through Silicon Via)矽穿孔與導電填孔、晶圓接合、晶圓薄化、晶圓搬運。本研究將針對TSV的蝕刻方法、介電層、擴散阻擋層和銅晶種鍍膜方式,進行學理上的探討,藉由不同文獻分析比對的結果,替產業找出可行性的技術路程圖,並在實驗室中,進行相關的驗証實驗。 最後以摸擬的方式,討論TSV在聚光型III-V太陽能電池之微型化模組封裝,對其散熱及效率提升的影響。 | zh_TW |
dc.description.abstract | Regarding to the development of semi-conductor, the width of the gate are decreasing 25% every 18 months to follow the Moor’s Law. It is getting more difficult as the width is far slim than before. The development of 3D IC process is a key for semiconductor to obey the Moor’s Law. As for 3D IC, there are 4 dominate technologies to achieve this technology. Including TSV( Through Silicon Via) , Cupper filling into the conducting hole, wafer bonding and wafer transportation. On this study, we will focus on the survey for these processes of TSV. Such as etching process, dielectric layer, diffusion barrier and the deposition of Cu layer. Through the comparison and analysis among various studies, we will finalize a technologic road map for semiconductor industry. We will also practice relative experiments in our lab. At the end, we will also simulate the heat dispersion and efficiency improvement effect of concentrative III-V photovoltaic with TSV process. | en_US |
dc.description.sponsorship | 行政院原子能委員會 | zh_TW |
dc.language.iso | zh_TW | en_US |
dc.subject | 矽穿孔 | zh_TW |
dc.subject | 聚光型III-V太陽能電池 | zh_TW |
dc.subject | Through Silicon Via | en_US |
dc.subject | Concentrator III-V photovoltaic | en_US |
dc.title | 3D矽穿孔(TSV)技術在微型化模組之應用 | zh_TW |
dc.title | 3D TSV (Through Silicon Via) for mini module application | en_US |
dc.type | Plan | en_US |
dc.contributor.department | 國立交通大學材料科學工程研究所 | zh_TW |
顯示於類別: | 研究計畫 |