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dc.contributor.authorWu, YCen_US
dc.contributor.authorChang, TCen_US
dc.contributor.authorLiu, PTen_US
dc.contributor.authorChen, CSen_US
dc.contributor.authorTu, CHen_US
dc.contributor.authorZan, HWen_US
dc.contributor.authorTai, YHen_US
dc.contributor.authorChang, CYen_US
dc.date.accessioned2014-12-08T15:18:14Z-
dc.date.available2014-12-08T15:18:14Z-
dc.date.issued2005-10-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2005.856797en_US
dc.identifier.urihttp://hdl.handle.net/11536/13185-
dc.description.abstractThis brief studies the electrical characteristics of a series of polysilicon thin-film transistors (poly-Si TFTs) with different numbers of multiple channels of various widths, with lightly doped drain (LDD) structures. The nanoscale TFT with ten 67-nm-wide split channels (M10) has superior and more uniform electrical characteristics than other TFTs. Additionally, experimental results reveal that the electrical performance of proposed TFTs enhances with each channel width decreasing, yielding a profile from a single-gate to tri-gate structure.en_US
dc.language.isoen_USen_US
dc.subjectlightly doped drain (LDD)en_US
dc.subjectnanowireen_US
dc.subjectpolysiliconen_US
dc.subjectthin-film transistor (TFT)en_US
dc.titleEffects of channel width on electrical characteristics of polysilicon TFTs with multiple nanowire channelsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2005.856797en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume52en_US
dc.citation.issue10en_US
dc.citation.spage2343en_US
dc.citation.epage2346en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000232193000033-
dc.citation.woscount16-
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