A novel dynamic threshold voltage MOSFET (DTMOS) using heterostructure channel of Si1-yCy interlayer

doi:10.1109/LED.2005.856011

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DC 欄位	值	語言
dc.contributor.author	Shieh, MS	en_US
dc.contributor.author	Chen, PS	en_US
dc.contributor.author	Tsai, MJ	en_US
dc.contributor.author	Lei, TF	en_US
dc.date.accessioned	2014-12-08T15:18:21Z	-
dc.date.available	2014-12-08T15:18:21Z	-
dc.date.issued	2005-10-01	en_US
dc.identifier.issn	0741-3106	en_US
dc.identifier.uri	http://dx.doi.org/10.1109/LED.2005.856011	en_US
dc.identifier.uri	http://hdl.handle.net/11536/13243	-
dc.description.abstract	We have demonstrated the fabrication of dynamic threshold voltage MOSFET (DTMOS) using the Si1-yCy(y = 0.005) incorporation inerlayer channel. Compare to conventional Si-DTMOS, the introduction of the Si1-yCy interlayer for this device is realized by super-steep-retrograde (SSR) channel profiles due to the retardation of boron diffusion. A low surface channel impurity with heavily doped substrate can be achieved simultaneously. This novel Si1-yCy channel heterostructure MOSFET exhibits higher transconductance and turn on current.	en_US
dc.language.iso	en_US	en_US
dc.subject	DTMOS	en_US
dc.subject	super-steep-retrograde (SSR) channel	en_US
dc.subject	Si1-yCy	en_US
dc.title	A novel dynamic threshold voltage MOSFET (DTMOS) using heterostructure channel of Si1-yCy interlayer	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/LED.2005.856011	en_US
dc.identifier.journal	IEEE ELECTRON DEVICE LETTERS	en_US
dc.citation.volume	26	en_US
dc.citation.issue	10	en_US
dc.citation.spage	740	en_US
dc.citation.epage	742	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000232208700014	-
dc.citation.woscount	1	-
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