標題: Downscaling Metal-Oxide Thin-Film Transistors to Sub-50 nm in an Exquisite Film-Profile Engineering Approach
作者: Lyu, Rong-Jhe
Shie, Bo-Shiuan
Lin, Horng-Chih
Li, Pei-Wen
Huang, Tiao-Yuan
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Film profile engineering (FPE);metal oxide (MO);short channel effects (SCEs);thin-film transistors;(TFTs);ZnO
公開日期: Mar-2017
摘要: We report an exquisite, film- profileengineering approach for producing nanometer-scale channel-length (L) ZnO thin-film transistors (TFTs). The scheme is based on a unique laminated structure in conjunction with a well-designed etching process for building a slender, suspending bridge that shadows the subsequent deposition of pivotal thin films of ZnO and gate oxide as well as simultaneously defines L of the TFTs. With the approach, we have ingeniously downscaled L of ZnO TFTs to as short as 10 nm. The experimental ZnO TFTs of L = 50 and 30 nm, respectively, exhibit excellent performance in terms of high on/off current ratio of 7.9x10(7) and 4.2x10(7), superior subthreshold swing of 92 and 95 mV/decade, and small drain induced barrier lowering of 0.1 and 0.29 V/V. Remarkably the nanometerscale ZnO TFTs possess excellent device uniformity. Furthermore, the precise control over the geometrical sizes for the channel length enables the fabrication of ultrashort ZnO TFTs of L as short as 10 nm with reasonable gate transfer characteristics.
URI: http://dx.doi.org/10.1109/TED.2016.2646221
http://hdl.handle.net/11536/133146
ISSN: 0018-9383
DOI: 10.1109/TED.2016.2646221
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 64
Issue: 3
起始頁: 1069
結束頁: 1075
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