標題: | A 8 Phases 192 MHz Crystal-Less Clock Generator with PVT Calibration |
作者: | Lu, Ting-Chou Ker, Ming-Dou Zan, Hsiao-Wen Liu, Jen-Chieh Lee, Yu 電機學院 電子工程學系及電子研究所 光電工程學系 College of Electrical and Computer Engineering Department of Electronics Engineering and Institute of Electronics Department of Photonics |
關鍵字: | crystal-less clock generator;multi-phase output;digital power application;process;voltage and temperature (PVT) calibration |
公開日期: | 一月-2017 |
摘要: | A multi-phase crystal-less clock generator (MPCLCG) with a process-voltage-temperature (PVT) calibration circuit is proposed. It operates at 192 MHz with 8 phases outputs, and is implemented as a 0.18pm CMOS process for digital power management systems. A temperature calibrated circuit is proposed to align operational frequency under process and supply voltage variations. It occupies an area of 65 mu m x 75 mu m and consumes 1.1 mW with the power supply of 1.8 V. Temperature coefficient (TC) is 69.5 ppm/degrees C from 0 to 100 degrees C, and 2-point calibration is applied to calibrate PVT variation. The measured period jitter is a 4.58-ps RMS jitter and a 34.55-ps peak-to-peak jitter (P2P jitter) at 192 MHz within 12.67k-hits. At 192 MHz, it shows a 1-MHz-offset phase noise of -102 dBc/Hz. Phase to phase errors and duty cycle errors are less than 5.5% and 4.3%, respectively. |
URI: | http://dx.doi.org/10.1587/transfun.E100.A.275 http://hdl.handle.net/11536/133325 |
ISSN: | 1745-1337 |
DOI: | 10.1587/transfun.E100.A.275 |
期刊: | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Volume: | E100A |
Issue: | 1 |
起始頁: | 275 |
結束頁: | 282 |
顯示於類別: | 期刊論文 |