Layout-Based Soft Error Rate Estimation Framework Considering Multiple Transient Faults-From Device to Circuit Level

Abstract

This paper investigated the soft errors caused by particle strikes, such as high-energy neutrons, extending beyond the deep submicrometer era. Considering the structure of the layout and resulting nuclear reactions, multiple transient faults (MTFs) tend to be induced more frequently than do single transient faults (STFs), due to the effects of technology scaling. This means that the soft error rates (SER) are beyond traditional netlist-based STF analysis, which can result in serious mis-estimations. This paper proposes a layout-based soft error estimation framework, which takes into account MTFs from the device level to the circuit level. This framework comprises two systems: 1) generation and 2) propagation. In the generation system, transient faults are modeled through nuclear reactions, charge collection, and voltage transformation at the device level. The propagation system abstracts these effects from the device level to the circuit level, taking into account three masking mechanisms associated with the propagation of transient faults. Experiment results demonstrate that the SER can be underestimated by an average of 15.72% if only single (rather than multiple) transient faults are taken into account. Our results indicate that netlist-based analysis for the estimation of SERs is no longer sufficient, due to the overwhelming influence of the structural layout. Thus, using benchmark c432, a tighter layout will result in an SER 34% higher than that generated in a looser layout.