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dc.contributor.authorHsu, Ching-Yien_US
dc.contributor.authorChang, Chun-Yenen_US
dc.contributor.authorChang, Edward Yien_US
dc.contributor.authorHu, Chenmingen_US
dc.date.accessioned2019-04-03T06:42:08Z-
dc.date.available2019-04-03T06:42:08Z-
dc.date.issued2016-03-01en_US
dc.identifier.issn2168-6734en_US
dc.identifier.urihttp://dx.doi.org/10.1109/JEDS.2015.2514060en_US
dc.identifier.urihttp://hdl.handle.net/11536/133496-
dc.description.abstractNon-uniformity in electric field causes early onset of tunneling near the edge of InAs/GaSb hetero-junction tunneling field-effect transistors. When a small area, often an edge, of the tunneling junction has a lower turn-on voltage, the steep switching characteristic is degraded. Fermi pinning at InAs surface greatly worsen the uniformity. We propose a dual-metal gate structure to address the non-uniformity issue. With proper choice of work functions, the dual-metal gate structure can effectively suppress the early onset of edge tunneling and significantly improve the subthreshold swing.en_US
dc.language.isoen_USen_US
dc.subjectInAs/GaSben_US
dc.subjecttunneling FET (TFET)en_US
dc.subjectquantum wellen_US
dc.subjectsurface statesen_US
dc.subjectFermi pinningen_US
dc.subjectnon-uniformityen_US
dc.subjectdual-metal gateen_US
dc.subjectsteep turn-onen_US
dc.titleSuppressing Non-Uniform Tunneling in InAs/GaSb TFET With Dual-Metal Gateen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/JEDS.2015.2514060en_US
dc.identifier.journalIEEE JOURNAL OF THE ELECTRON DEVICES SOCIETYen_US
dc.citation.volume4en_US
dc.citation.issue2en_US
dc.citation.spage60en_US
dc.citation.epage65en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000373055800004en_US
dc.citation.woscount9en_US
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