完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWu, MCen_US
dc.contributor.authorChien, CSen_US
dc.contributor.authorLu, KSen_US
dc.date.accessioned2014-12-08T15:18:35Z-
dc.date.available2014-12-08T15:18:35Z-
dc.date.issued2005-09-01en_US
dc.identifier.issn0268-3768en_US
dc.identifier.urihttp://dx.doi.org/10.1007/s00170-003-2031-1en_US
dc.identifier.urihttp://hdl.handle.net/11536/13378-
dc.description.abstractControl and dummy (C/D) wafers are indispensable materials used in a semiconductor fab. C/D wafers stored in a high-grade buffer can be downgraded to several low-grade buffers. The downgrade decision is to determine the amount to downgrade for each of these low-grade buffers. Previous literature solves the downgrade decision by considering only the instantaneous WIP information, which is a short-term approach and may not yield the optimum solution in the long run. This paper presents an LP model to solve the downgrade decision problem, which aims to minimize the long-term daily usage of brand-new C/D wafers in a fab. The formulated problem assumes that the storage cost of C/D wafers is much less than the usage cost. This assumption has been justified by analyzing the cost structure of C/D wafers in a typical fab site.en_US
dc.language.isoen_USen_US
dc.subjectcontrol wafersen_US
dc.subjectdowngrade decisionen_US
dc.subjectdummy wafersen_US
dc.subjectmonitor wafersen_US
dc.subjectsemiconductor faben_US
dc.subjecttest wafersen_US
dc.titleDowngrade decision for control/dummy wafers in a faben_US
dc.typeArticleen_US
dc.identifier.doi10.1007/s00170-003-2031-1en_US
dc.identifier.journalINTERNATIONAL JOURNAL OF ADVANCED MANUFACTURING TECHNOLOGYen_US
dc.citation.volume26en_US
dc.citation.issue5-6en_US
dc.citation.spage585en_US
dc.citation.epage590en_US
dc.contributor.department工業工程與管理學系zh_TW
dc.contributor.departmentDepartment of Industrial Engineering and Managementen_US
dc.identifier.wosnumberWOS:000231605200019-
dc.citation.woscount3-
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