標題: Optimal design of the multiple-apertures-GaN-based vertical HEMTs with SiO2 current blocking layer
作者: Shrestha, Niraj Man
Li, Yiming
Chang, Edward Yi
材料科學與工程學系
資訊工程學系
Department of Materials Science and Engineering
Department of Computer Science
關鍵字: Vertical high electron mobility transistor;Silicon dioxide current blocking layer;Multiple apertures;Electrical characteristic;Breakdown voltage;Simulation
公開日期: 三月-2016
摘要: Gallium nitride (GaN) based vertical high electron mobility transistor (HEMT) is very crucial for high power applications. Combination of advantageous material properties of GaN for high speed applications and novel vertical structure makes this device very beneficial for high power application. To improve the device performance especially in high drain bias condition, a novel GaN based vertical HEMT with silicon dioxide (SiO2) current blocking layer (CBL) was reported recently. In this paper, effects of the thickness of CBL layer and the aperture length on the electrical and breakdown characteristics of GaN vertical HEMTs with SiO2 CBL are simulated by using two-dimensional quantum-mechanically corrected device simulation. Intensive numerical study on the device enables us to optimize and conclude that devices with 0.5-mu m-thick SiO2 layer and 1-mu m-long aperture will be beneficial considerations to improve the device performance. Notably, using the multiple apertures can effectively reduce the on-state conducting resistance of the device. On increasing the number of apertures, the drain current is increased but the breakdown voltage is decreased. Therefore, device with four apertures is taken as an optimized result. The maximum drain current of 84 mA at V-G = 1V and V-D = 30 V, and the breakdown voltage of 480 V have been achieved for the optimized device.
URI: http://dx.doi.org/10.1007/s10825-015-0738-5
http://hdl.handle.net/11536/134046
ISSN: 1569-8025
DOI: 10.1007/s10825-015-0738-5
期刊: JOURNAL OF COMPUTATIONAL ELECTRONICS
Volume: 15
Issue: 1
起始頁: 154
結束頁: 162
顯示於類別:期刊論文