完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChang, Yuan-Weien_US
dc.contributor.authorCheng, Yinen_US
dc.contributor.authorXu, Fengen_US
dc.contributor.authorHelfen, Lukasen_US
dc.contributor.authorTian, Tianen_US
dc.contributor.authorDi Michiel, Marcoen_US
dc.contributor.authorChen, Chihen_US
dc.contributor.authorTu, King-Ningen_US
dc.contributor.authorBaumbach, Tiloen_US
dc.date.accessioned2017-04-21T06:55:10Z-
dc.date.available2017-04-21T06:55:10Z-
dc.date.issued2016-09-15en_US
dc.identifier.issn1359-6454en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.actamat.2016.06.059en_US
dc.identifier.urihttp://hdl.handle.net/11536/134230-
dc.description.abstractIn the microelectronics industry the flip-chip (FC) technology is broadly used to enhance the packaging density. However, the small size and the unique geometry of the FC solder joints induce the electro-migration (EM) reliability issue. In this study, a pair of lead-free solder joints (SAC1205) was EM tested by a current of 7.5 x 10(3) A/cm(2). During the tests, X-ray laminography was applied to observe the microstructure evolution in-situ. Laminography enables the non-destructive observation of the bump microstructure and allows for a quantitative three-dimensional (3D) analysis. After EM testing for 650 h, a new EM failure mechanism was found, differing from the two well-known models, the pancake void propagation and the under-bump-metallization dissolution. Here, a few pre-existing small voids grew and simultaneously many new voids formed and grew over the entire EM testing period. Most of the nucleating voids were distributed in the current crowding region, a few also located in the low-current density region. As the testing time increased, voids increasingly coalesced with each other, forming a porous network which occupied a large part of the interface area and caused the EM failure. A finite element (FE) method was then applied to analyze the interplay between the microstructure evolution and current density redistribution. A series of 3D FE models was built based on the laminography images for the different testing stages. The current density distribution from the FE analysis indicates that the formation of discrete voids did not affect the global current density distribution until a major coalescence of the voids occurred. The relieving of the global current crowding in the pancake void model was not found in this new EM failure mechanism. It was the local current crowding around individual void found in the new mechanism that is held responsible for the EM retardation. (C) 2016 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectElectromigrationen_US
dc.subjectFlip-chipen_US
dc.subjectLaminographyen_US
dc.subjectSynchrotron radiationen_US
dc.subjectFinite-element modelingen_US
dc.titleStudy of electromigration-induced formation of discrete voids in flip-chip solder joints by in-situ 3D laminography observation and finite-element modelingen_US
dc.identifier.doi10.1016/j.actamat.2016.06.059en_US
dc.identifier.journalACTA MATERIALIAen_US
dc.citation.volume117en_US
dc.citation.spage100en_US
dc.citation.epage110en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.identifier.wosnumberWOS:000383005300010en_US
顯示於類別:期刊論文