標題: A New Variation Plot to Examine the Interfacial-dipole Induced Work-function Variation in Advanced High-k Metal-gate CMOS Devices
作者: Hsieh, E. R.
Wang, Y. D.
Chung, Steve S.
Ke, J. C.
Yang, C. W.
Hsu, S.
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2016
摘要: The interfacial dipole and bulk trap in HKMG stack have been found to be significant to the work function variation (sigma V-WF), in addition to the metal grains. In order to differentiate their effects on sigma V-WF, a new variation plot is proposed and the dipole and trap effects can be distinguished. Here, we propose a simple experimental method to separate the effects of MG/HK and HK/IL interfacial dipoles. In pMOSFET, HK/IL dipoles dominate HK induced variation; MG/HK dipoles are dominant in nMOSFET. However, in terms of the reliability test, after PBTI stress, HK bulk traps play a major role in the variation of nMOSFET, while after NBTI, HK/IL dipoles are strengthened by hydrogen bonds and still dominant in work function variation of pMOSFET. Design guideline is provided to deal with the passivation of high-k traps by nitrogen concentration and the improvement of variability in HKMG CMOS devices.
URI: http://hdl.handle.net/11536/134336
ISBN: 978-1-5090-0638-0
期刊: 2016 IEEE SYMPOSIUM ON VLSI TECHNOLOGY
顯示於類別:會議論文