標題: | A 16Gb/s 14.7mW Tri-Band Cognitive Serial Link Transmitter with Forwarded Clock to Enable PAM-16 / 256-QAM and Channel Response Detection in 28 nm CMOS |
作者: | Du, Yuan Cho, Wei-Han Li, Yilei Wong, Chien-Heng Du, Jieqiong Huang, Po-Tsang Kim, Yanghyo Chen, Zuow-Zun Lee, Sheau Jiung Chang, Mau-Chung Frank 交大名義發表 National Chiao Tung University |
公開日期: | 2016 |
摘要: | A cognitive tri-band transmitter with forwarded clock using multi-band signaling and high-level digital signal modulations is presented for serial link application. The transmitter features learning an arbitrary channel response by sending a sweep of continuous wave, detecting power level, and accordingly adapts modulation scheme, data bandwidth and carrier frequency. The modulation scheme ranges from NRZ/QPSK to PAM-16/256-QAM. The highly re-configurable transmitter is capable of dealing with low-cost serial link cables/connectors or multi-drop buses with deep and narrow notches in frequency domain (e.g. 40dB loss at notches). The adaptive multi-band scheme mitigates equalization requirement and enhances the energy efficiency by avoiding frequency notches and utilizing the maximum available signal-to-noise ratio and channel bandwidth. The implemented transmitter consumes 14.7mW power and occupies 0.016mm(2) in 28nm CMOS. It achieves a maximum data rate of 16Gb/s per differential pair and the most energy-efficient FoM (defined in Fig. 8) of 20.4 mu W/Gb/s/dB considering channel condition. |
URI: | http://hdl.handle.net/11536/134571 |
ISBN: | 978-1-5090-0635-9 |
期刊: | 2016 IEEE SYMPOSIUM ON VLSI CIRCUITS (VLSI-CIRCUITS) |
Appears in Collections: | Conferences Paper |