完整後設資料紀錄
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dc.contributor.authorChang, Ching-Yunen_US
dc.contributor.authorLee, Shih-Weien_US
dc.contributor.authorChang, Geng-Mingen_US
dc.contributor.authorChen, Kuan-Nengen_US
dc.date.accessioned2017-04-21T06:49:18Z-
dc.date.available2017-04-21T06:49:18Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-5090-4769-7en_US
dc.identifier.issn2150-5934en_US
dc.identifier.urihttp://hdl.handle.net/11536/134592-
dc.description.abstractIn this research, a single sided heating method is developed to solve the issue of metal oxidation at bottom substrate without antioxidant metal coating in chip-to-wafer bonding. By using optimized bonding parameter, the bonding quality and electrical performance is better than double sided heating in chip-to-wafer bonding. With the help of Cu/In low temperature bonding and single sided heating approach, chip-to-wafer bonding is successfully developed. With the additional annealing process, the bonding duration of single sided heating bonding can be reduced to keep the cost down. Interconnects also maintain good electrical properties after reliability test such as TCT and unbiased HAST. These results prove that the single sided heating method is able to provide good bonding quality and reliability for chip-to-wafer bonding process.en_US
dc.language.isoen_USen_US
dc.titleSingle Sided Heating Method for Chip-to-Wafer Bonding with Submicron Cu/In Interconnectsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 11TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT-IAAC 2016)en_US
dc.citation.spage38en_US
dc.citation.epage41en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000391819600001en_US
dc.citation.woscount0en_US
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