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dc.contributor.authorHsieh, Shang-Hsunen_US
dc.contributor.authorHung, Jo-Chunen_US
dc.contributor.authorWeng, Heng-Juien_US
dc.contributor.authorTsai, Ming-Fuen_US
dc.contributor.authorChiang, Chih-Chien_US
dc.contributor.authorChen, Ming-Jeren_US
dc.date.accessioned2017-04-21T06:48:46Z-
dc.date.available2017-04-21T06:48:46Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-5090-0726-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/134671-
dc.description.abstractOn the industrial HKMG silicon MOSFETs with different channel lengths L down to 14 nm, we present high-resolution TEM cross-section images to highlight interstitial defects in the channel near the source and drain. To examine such neutral defects, we devise a new 2D microscopic scattering model and use it to extract the apparent neutral defects density from the measured inversion-layer effective mobility. We find that for L > 25 nm, the extracted defect densities are independent of temperature, as expected. However, for L < 25 nm, the plasmons in the highly doped source and drain regions prevail over neutral defects. Further measured degradation in the virtual source velocity at saturation matches that of full Coulomb Monte Carlo simulation, for the first time experimentally confirming S/D plasmons as the dominant mechanism for L < 25 nm.en_US
dc.language.isoen_USen_US
dc.titleTwo Competing Limiters in MOSFETs Scaling: Neutral Defects and S/D Plasmonsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW)en_US
dc.citation.spage32en_US
dc.citation.epage33en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000391250500012en_US
dc.citation.woscount0en_US
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