高介電金屬閘極短通道場效電晶體之長距庫倫效應、電中性缺陷散射及遠程偶極散射

Abstract

持續微縮的電子元件遭遇顯著的傳輸特性劣化，此劣化已經被觀察並歸納為以下幾點: 源極/汲極的電漿子效應、中性缺陷、遠程偶極。其中，中性缺陷與遠程偶極兩者可歸因於製程因素，前者來自於離子佈值後的熱預算缺乏，而後者來自於高介電金屬閘極堆疊的採用。而中性缺陷常聚於源極/汲極的兩端，當通道長度減少時，中性缺陷的濃度會等效的提升，進而劣化傳輸特性。為了研究者兩者的效應，我們提出兩個模型。首先，一個適用於二維電子在金屬-氧化層-半導體之場效電晶體中的反轉層受中性缺陷散射之散射率被推導出來。該公式提供了中性缺陷所造之電子遷移率的經驗關係式，n = c/Nn。其中Nn是中性缺陷的濃度，c是係數，係數c是無關反轉層濃度、溫度、甚至應力。這個公式被應用到實驗之中，並排除了馬西森定則的誤差。再者，我們推導了一個新的微觀公式來用於計算在高介電金屬閘極堆疊的場效電晶體之反轉層中，遠程電偶極所造成的弛豫時間。 這個散射公式可以應用於兩個組態，1) 單電偶極組態 以及 2) 雙電偶極組態。我們發現當重現電子遷移率在採用高介電金屬閘極堆疊的場效電晶體之反轉層中時，前者會產生非常大的電偶密度，高達每平方公分1015對，伴隨著12伏特的臨界電壓偏移。這個結果雖相當接近蒙地卡羅方法之結果。但重要的是，若採用後者，並且考慮實驗觀察到的固定電荷，則對應的電偶極密度就下降到每平方公分1014對，伴隨較小的 2 伏特臨界電壓偏移，相當接近實驗。 談到電漿子，這些通常存在於場效電晶體中高摻雜區域的源極/汲極，會透過長距庫倫效應來遲緩通道電子的傳輸速度，進而劣化整個元件的傳輸特性。為了瞭解這個效應，我們研究少數載子注入的實驗，並且萃取出因為電漿子效應所造成的電位擾動。透過此萃取之結果，給出了一個與濃度、溫度都相關的電位擾動經驗公式。這個實驗萃取的電位擾動公式以及電子電漿散射公式，都被用來驗證三維的矽材料電子遷移率。除此之外，對庫倫遲緩(源於電子電漿散射)，我們提出了方法來描述前述它，1)電子電漿的共振要件，2)強化電子電漿交互作用的因素。前者是利用我們觀察長通道極薄氧化層(約1奈米)之場效電晶體中，電子遷移率因為閘極層表面電漿、三維電漿所引致的劣化，所得出的結論，後者是來自於前述實驗所萃取的電位擾動公式而來的應用。在這個觀察劣化的實驗當中，我們了解當源極/汲極的電漿子在影響傳輸特性時，元件的電子遷移率將會在反轉層濃度約每平方公分5 × 1012時，開始劇烈下降，並有溫度的趨勢T-1，並且這個效應會隨著通道長度縮短而越來越強。電漿子效應以及中性缺陷都是會隨著通道長度縮短而劣化傳輸特性，他們兩者將變得難解難分。為了區分他們兩者，我們優先採用新穎的二維微觀中性缺陷散射率，來研究採用高介電金屬閘極堆疊的場效電晶體，分別考慮不同長度短至14奈米、以及溫度區間(300 至 400 絕對溫度)。利用了重現實驗量測的場效電晶體電子遷移率，我們萃取出了表面的中性缺陷濃度。我們發現當通道長度大過25奈米之時，表面中性缺陷濃度不隨溫度而變，這個結論合乎預期。但當通道長度縮減至25奈米及以下，我們認為源極/汲極電漿子的影響勝過中性缺陷。進一步地，測量的源極端電子速度的在飽和區的劣化，與蒙地卡羅對源極/汲極電漿子的預測相當一致，這也是首次，以實驗方法證實了源極/汲極電漿子在通道長度25奈米之後的影響。

The continued scaling of electronic devices encounters the significant performance degradations, which have so far been observed and attributed to the source/drain plasmons, neutral defects and remote dipoles. Both neutral defect and remote dipoles are caused by some factors of process. Specifically, the former is likely caused by ion-implantation with lacks of enough thermal budget, whereas the latter stems from the application of the HKMG stack. Moreover, the density of the neutral defect near the source/drain halos or extensions will effectively increase as the channel length reduces, degrading carrier mobility. To examine two effects, we devised two corresponding new models. First, a new microscopic formalism for the scattering of 2D electrons by neutral defects in the inversion layers of metal-oxide-semiconductor field-effect transistors (MOSFETs) is derived, leading to an empirical model: n = c/Nn, where Nn is the neutral defect density and c is a constant, regardless of the inversion-layer density, the strain, or the temperature. Experimental application of the model is demonstrated, taking into account the error of Matthiessen’s rule. Second, we devise a new microscopic formalism for the remote dipole scattering (RDS) limited relaxation time in the inversion layers of HKMG MOSFETs. This formalism can apply to two different dipole configurations: (i) a “one dipole” configuration and (ii) a “paired dipoles” configuration. We find that when fitting the inversion-layer effective electron mobility measured from the industry-level hafnium-based metal gate MOSFETs, the former configuration yields a large value of the HK/IL interface dipole density of around 1015 cm-2, accompanied by a large threshold voltage shift ΔVthdipole of 12 V. These values are comparable with those of the existing Monte Carlo simulation. More importantly, in case of the latter configuration (paired dipoles) plus the experimentally determined fixed charges, the corresponding values can be significantly reduced to 1014 cm-2 and 2 V, which are quite close to the experimental estimations in the literature. For plasmons, which exist the highly doped source and drain regions of silicon field-effect transistors, can strongly drag channel electrons via long-range collective Coulomb interactions and cause deteriorations in overall device performances. To examine such interactions, we investigate the experiment of the plasmon-enhanced minority carrier injection in order to extract the evidence of the plasmon-excited potential fluctuation, delivering an empirical formula as a strongly function of both the doping concentration and temperature. Both the experimentally extracted potential fluctuation and the electron-plasmon scattering formalisms are further applied into the calculation of the underlying mobility in bulk silicon. Besides, for Coulomb drag consideration, we proposed an analytic method in terms of two criteria: 1) one for the occurrence of the plasmon resonance and 2) the other for the strength of the plasmons. The former is determined based on our experimental observation of long-channel ultrathin oxide (~1 nm) MOSFETs, whose degradation is due to both the interface plasmons and the bulk plasmons in gate. The latter makes use of the previous extracted potential fluctuation. The effects of the temperature on the criteria are considered. It is a straightforward task to confirm that for a channel density larger than approximately 5 × 1012 cm−2, the source/drain plasmons degrades the mobility with the temperature trend of T-1 and will be strengthened as the distance between source/junction and junction/drain is further closer. Both plamons and neutral defects associated with ultrashort channel degradation are likely competing with each other. With an aim to distinguish them, the proposed 2D microscopic neutral defect scattering model is preferentially performed to study the industrial HKMG silicon MOSFETs with different channel lengths L down to 14 nm and different temperatures (300 to 400 K). The apparent neutral defects density have been extracted from the measured inversion-layer effective mobility. We find that for L > 25 nm, the extracted defect densities are independent of temperature, as expected. However, for L < 25 nm, the plasmons in the highly doped source and drain regions prevail over neutral defects. Further measured degradation in the virtual source velocity at saturation matches that of full Coulomb Monte Carlo simulation, for the first time experimentally confirming S/D plasmons as the dominant mechanism for L < 25 nm.