Dual-Section-Average (DSA) Analog-to-Digital Converter (ADC) in Digital Pulse Width Modulation (DPWM) DC-DC Converter for Reducing the Problem of Limiting Cycle

Abstract

This paper proposes a dual-section average (DSA) analog-to-digital converter (ADC) to achieve a closed-loop digital pulse width modulation (DPWM) DC-DC converter with performance compatible to that by the analog PWM converter. For a 2.4V input voltage, a regulated output voltage of 1.2V can provide output current of 600mA without any off-chip compensators. Besides, the output ripple can be reduced to about 8mV(p-p) by theoretical result. The test chip was fabricated in 0.35 mu m CMOS technology. Owing to the parasitic resistance, the output ripple of the experimental result is within 8mV(p-p). Furthermore, the transient recovery time is within 50 mu s when load current changes from 120mA to 600mA, or vice versa.