Study of low-temperature and post-stress hysteresis in high-k gate dielectrics

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Wu, You-Lin	en_US
dc.contributor.author	Lin, Shi-Tin	en_US
dc.contributor.author	Yang, Chang Cheng	en_US
dc.contributor.author	Wu, Chien-Hung	en_US
dc.contributor.author	Chin, Albert	en_US
dc.date.accessioned	2017-04-21T06:49:09Z	-
dc.date.available	2017-04-21T06:49:09Z	-
dc.date.issued	2007	en_US
dc.identifier.isbn	978-1-4244-1891-6	en_US
dc.identifier.uri	http://hdl.handle.net/11536/135140	-
dc.language.iso	en_US	en_US
dc.title	Study of low-temperature and post-stress hysteresis in high-k gate dielectrics	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2007 INTERNATIONAL SEMICONDUCTOR DEVICE RESEARCH SYMPOSIUM, VOLS 1 AND 2	en_US
dc.citation.spage	175	en_US
dc.citation.epage	+	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000255857100089	en_US
dc.citation.woscount	0	en_US
顯示於類別：	會議論文