Reliability of strained-channel NMOSFETs with SiN capping layer on Hi-wafers with a thin LPCVD-TEOS buffer layer

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Tsai, Tzu-, I	en_US
dc.contributor.author	Lee, Yao-Jen	en_US
dc.contributor.author	Chen, King-Sheng	en_US
dc.contributor.author	Wang, Jeff	en_US
dc.contributor.author	Wan, Chia-Chen	en_US
dc.contributor.author	Hsueh, Fu-Kuo	en_US
dc.contributor.author	Lin, Horng-Chih	en_US
dc.contributor.author	Cha, Tien-Sheng	en_US
dc.contributor.author	Huang, Tiao-Yuan	en_US
dc.date.accessioned	2017-04-21T06:49:10Z	-
dc.date.available	2017-04-21T06:49:10Z	-
dc.date.issued	2007	en_US
dc.identifier.isbn	978-1-4244-1891-6	en_US
dc.identifier.uri	http://hdl.handle.net/11536/135143	-
dc.language.iso	en_US	en_US
dc.title	Reliability of strained-channel NMOSFETs with SiN capping layer on Hi-wafers with a thin LPCVD-TEOS buffer layer	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2007 INTERNATIONAL SEMICONDUCTOR DEVICE RESEARCH SYMPOSIUM, VOLS 1 AND 2	en_US
dc.citation.spage	331	en_US
dc.citation.epage	+	en_US
dc.contributor.department	物理研究所	zh_TW
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Institute of Physics	en_US
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000255857100170	en_US
dc.citation.woscount	0	en_US
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