標題: | Analog Placement and Global Routing Considering Wiring Symmetry |
作者: | Yang, Yu-Ming Jiang, Iris Hui-Ru 電機學院 電子工程學系及電子研究所 College of Electrical and Computer Engineering Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Analog design automation;wiring symmetry |
公開日期: | 2010 |
摘要: | Unlike the mature and highly automatic flow for digital layout generation, the existing method to generate an analog layout is far from automatic because it highly depends on the designer\'s expertise. Prior endeavors are mainly dedicated to analog placement because they consider only the device symmetry constraint. This paper raises the wiring symmetry issue to analog layout: wiring symmetry is as crucial as device symmetry. Hence, we propose an analog placement and global routing algorithm to consider both types of symmetry constraints. During placement, we utilize the device folding technique to enhance the flexibility and feasibility on symmetry. Our results show that our algorithm can produce a promising initial layout to speed up the analog design process. |
URI: | http://hdl.handle.net/11536/135595 |
ISBN: | 978-1-4244-6455-5 |
ISSN: | 1948-3287 |
期刊: | PROCEEDINGS OF THE ELEVENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2010) |
起始頁: | 618 |
結束頁: | 623 |
Appears in Collections: | Conferences Paper |