標題: 3D-TCAD Simulation Study of the Novel T-FinFET Structure for Sub-14nm Metal-Oxide-Semiconductor Field-Effect Transistor
作者: Chou, Chen-Han
Hsu, Chung-Chun
Chung, Steve S.
Chien, Chao-Hsin
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2015
摘要: We propose a novel device structure, namely T-FinFET, for sub-14nm MOSFET with using lighter anti punch through (APT) implant. According to 3D TCAD simulation, the T-FinFET is found to posses many advantages over the normal FinFET, such as better short channel effect (SCE) and drain induced barrier lowering (DIBL), having smaller S/D capacitance and junction leakage and fewer masks. Compared to gate-all-around (GAA) structure, the T-FinFET also has compatible electrical performance. All these features are obtained by depositing a self-aligned (SA) oxide after recessing the Si fin in the S/D region. It can be applied to Ge and III-V MOSFETs for suppressing the SCEs and S/D leakage, arising from higher permittivity and lower band gap than Si.
URI: http://hdl.handle.net/11536/135836
ISBN: 978-1-4673-7604-4
期刊: 2015 SILICON NANOELECTRONICS WORKSHOP (SNW)
Appears in Collections:Conferences Paper