標題: | Dynamic Pipeline-Partitioned Video Decoding on Symmetric Stream Multiprocessors |
作者: | Wu, Ming-Ju Chen, Yan-Ting Tsai, Chun-Jen 資訊工程學系 Department of Computer Science |
關鍵字: | Symmetric stream multiprocessor (SSMP);parallel video decoding;dynamic software pipeline;dynamic load balance |
公開日期: | 2015 |
摘要: | In this paper, we have implemented a dynamic pipeline-partitioning video decoder for the symmetric stream multiprocessor (SSMP) architecture. The SSMP architecture extends the traditional symmetric multiprocessor (SMP) architecture with dedicated per-core scratchpad memories and inter-processor communication (IPC) controllers for efficient data passing between the processor cores. The SSMP architecture allows the processor cores to cooperate efficiently in a fine-grained software pipeline fashion. A traditional software pipelined video decoder has fixed pipeline-stage partitions. The AVC/H.264 video decoder investigated in this paper dynamically assigns different stages of the video macroblock (MB) decoding tasks to different processor cores in order to maintain load balance among the processor cores. The pipeline partitioning policy is based on the queue levels of the inter-stage buffers. Experimental results show that, on average, the proposed dynamic pipeline-partitioning video decoder is 34% faster compared to a wavefront-based parallel video decoder. |
URI: | http://hdl.handle.net/11536/135845 |
ISBN: | 978-1-4799-1925-3 |
ISSN: | 1063-6862 |
期刊: | PROCEEDINGS OF THE ASAP2015 2015 IEEE 26TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS |
起始頁: | 106 |
結束頁: | 110 |
Appears in Collections: | Conferences Paper |