完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Zhang, Guoyan | en_US |
dc.contributor.author | Dong, Aihua | en_US |
dc.contributor.author | Liu, Nie | en_US |
dc.contributor.author | Tian, Rui | en_US |
dc.contributor.author | Yang, Xuejiao | en_US |
dc.contributor.author | Liu, Zhiwei | en_US |
dc.contributor.author | Lee, Kohui | en_US |
dc.contributor.author | Lin, Horng-Chih | en_US |
dc.contributor.author | Liou, Juin J. | en_US |
dc.contributor.author | Wang Yuxin | en_US |
dc.date.accessioned | 2017-04-21T06:48:54Z | - |
dc.date.available | 2017-04-21T06:48:54Z | - |
dc.date.issued | 2014 | en_US |
dc.identifier.isbn | 978-1-4799-2334-2 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/135878 | - |
dc.description.abstract | Electrostatic discharge (ESD) characters of Nanowire Field Effect Transistors have been tested and analyzed in detail in this paper. TLP (transmission line pulsing technique) and semiconductor characterization system have been used for experiments. The failure currents and leakage currents of Nanowire Field Effect Transistor are characterized. Also, physical insights and failure model are provided to analyze the failure mechanism. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Electrostatic discharge (ESD) | en_US |
dc.subject | TLP | en_US |
dc.subject | Nanowire FET | en_US |
dc.subject | Failure analysis | en_US |
dc.title | Failure Analysis of Gate-all-around Nanowire Field Effect Transistor Under TLP Test | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2014 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.identifier.wosnumber | WOS:000380453100048 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |