完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lin, CC | en_US |
dc.contributor.author | Shih, YH | en_US |
dc.contributor.author | Chang, HC | en_US |
dc.contributor.author | Lee, CY | en_US |
dc.date.accessioned | 2014-12-08T15:18:54Z | - |
dc.date.available | 2014-12-08T15:18:54Z | - |
dc.date.issued | 2005-06-01 | en_US |
dc.identifier.issn | 1057-7122 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TCSI.2005.849106 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/13606 | - |
dc.description.abstract | In this paper, a 64-state four-bit soft-decision Viterbi decoder with power saving mechanism for high speed wireless local area network applications is presented. Based on path merging and prediction techniques, a survivor memory unit with hierarchical memory design is proposed to reduce memory access operations. It is found that more than 70% memory access can be reduced by taking advantage of locality. Moreover, a low complexity compare-select-add unit is also presented, leading to save 15% area and 14.3% power dissipation as compared to conventional add-compare-select design. A test chip has been designed and implemented in 0.18-mu m standard CMOS process. The test results show that 30 similar to 40% power dissipation can be reduced, and the power efficiency reaches 0.75 mW per Mb/s at 6 Mb/s and 1.26 mW per Mb/s at 54 Mb/s as specified in IEEE 802.11a. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | add-compare-select | en_US |
dc.subject | path merging | en_US |
dc.subject | path prediction | en_US |
dc.subject | survivor memory | en_US |
dc.subject | Viterbi decoder | en_US |
dc.title | Design of a power-reduction viterbi decoder for WLAN applications | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TCSI.2005.849106 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | en_US |
dc.citation.volume | 52 | en_US |
dc.citation.issue | 6 | en_US |
dc.citation.spage | 1148 | en_US |
dc.citation.epage | 1156 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000229818800012 | - |
dc.citation.woscount | 27 | - |
顯示於類別: | 期刊論文 |